289 Electrical Engineering jobs in Singapore

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at .

Job Description:

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Master’s or PhD degree in EE is required, preferably from a top-tier university.
• 8+ years of experience supporting or developing complex analog IC designs.

Required Experience:

• Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution and other high-speed analog circuits is a must.
• Deep understanding of biasing, band-gaps, reference circuits, opamps, comparators, and other analog circuits.
• Solid track record for implementation of analog circuits for high-speed data transmission.
• Design and tape-out experience in advanced CMOS nodes (e.g., 7nm, 5nm, 3nm FinFET) is a must.
• Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
• Knowledge of TIA design and drivers for optical applications is highly desirable.
• Experience in RFIC design for wireless or wireline communication systems is highly desirable.
• Strong technical independent contributor with a proven ability to drive results.
• Excellent teamwork, presentation, and documentation skills.
• Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.
• Strong experience in lab chip bring-up and debugging efforts.

Preferred Experience:

• Relevant research publications and/or patents in analog or RF IC design.
• Familiarity with programming/scripting languages such as Python, Matlab, or C.
• Experience with PCB design.
• Familiarity with Verilog RTL or DSP design concepts.
• Knowledge of optical transceivers.
• Expertise in ESD protection techniques and IC packaging methodologies.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at .

Job Description:

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Master’s or PhD degree in EE is required, preferably from a top-tier university.
• 2+ years of experience supporting or developing complex analog IC designs.

Required Experience:

• Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, and low-jitter CLK distribution.
• Deep understanding of biasing, band-gaps, reference circuits, opamps, comparators, and other analog circuits.
• Solid track record for implementation of analog circuits for high-speed data transmission.
• Design and tapeout experience in advanced CMOS nodes (e.g., 20nm or newer) is a must.
• Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
• Knowledge of TIA design and drivers for optical applications is highly desirable.
• Experience in RFIC design for wireless or wireline communication systems is highly desirable.
• Strong technical independent contributor with a proven ability to drive results.
• Excellent teamwork, presentation, and documentation skills.
• Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.
• Strong experience in lab chip bring-up and debugging efforts.

Preferred Experience:

• Relevant research publications and/or patents in analog or RF IC design.
• Familiarity with programming/scripting languages such as Python, Matlab, or C.
• Experience with PCB design.
• Familiarity with Verilog RTL or DSP design concepts.
• Knowledge of optical transceivers.
• Expertise in ESD protection techniques and IC packaging methodologies.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

(Sr./Staff) Design Verification Engineer at OMNIVISION

As a design verification engineer, you will be part of a passionate verification team that develops and deploys state-of-the-art verification methodologies for complex designs. Your goal is to achieve zero-defect verification using advanced techniques such as UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification.

• Experience in UVM verification methodology
• Disciplined, quality-minded, and highly driven for excellence
• Excellent team player with good communication skills
• MSEE/BSEE in Electrical or Computer Engineering with 8+ years of relevant experience, or outstanding fresh graduates
• Relevant experience may qualify for Senior or Staff level responsibilities
• Experience in video processing and analytics is a plus
• Strong programming skills are a plus

• Seniority level: Mid-Senior level
• Employment type: Full-time
• Job function: Engineering and Information Technology
• Industry: Semiconductor Manufacturing

Based in Singapore

RESPONSIBILITIES

1. Set design criteria, check design calculation and drawings;
2. Agree on design concepts with Team Leader;
3. Ensure concept and sketch designs are approved before progressing to the next stage;
4. Assist in preparing fee proposals;
5. Carry out feasibility work;
6. Advise and report to the Team Leader and Division Manager on the adequacy of the services;
7. Formalize standards for specifications, drawings etc. in conjunction with Team Leaders and the Division Manager;
8. Resolve any technical problems faced during the project design and/or construction stages;
9. Investigate and recommend on engineering system selection;
10. Handle all correspondences including reports, technical specifications, and other documents relating to the projects;
11. Prepare and monitor cost and quantity estimates (assist for clarifications only);
12. Attend design/site meetings;
13. Assist Team Leader in internal staff management;
14. Assist in business development activities;
15. Senior engineers must be able to lead projects and a team of engineers/technicians under their charge;
16. Senior engineers must become fully familiar with coded and local Authority requirements;
17. Other duties and responsibilities as reasonably required by the Team Leader/Division Manager.

Requirements

1. Degree in Electrical Engineering recognized by Professional Engineering Board. Master’s degree in building services engineering or equivalent will also be considered;
2. 7 to 10 years experience in design consultancy within the MEP consultancy field;
3. Chartership membership with professional institutions is an advantage (CEng IEEE IET IES etc);
4. Ability to articulate and present design ideas, and report to stakeholders independently;
5. Experience in international airports and data centres is preferred;
6. Good interpersonal and communication skills.

Interested applicants, please send your resume to .

We are a closely-knit team aspiring to change the world through disruptive technology. We are innovators. We are tinkerers. We are problem-solvers. And we have a fair amount of magic dust up our sleeves. We have a plan for fleet-level deployment of autonomous vehicles, and we are looking for the best-of-the-best to join us in making this a reality.

Based in the U.S. and Asia, Venti Technologies is the leader in safe-speed autonomous logistics systems, developing the future of goods transportation. Using rigorous mathematics, deep learning, and theoretically-grounded algorithms, Venti has a proprietary collection of autonomy technologies including a suite of powerful logistics algorithms. Venti’s proven value proposition of saving costs, increasing vehicle utilization, and improving safety is recognized by customers and driving growth. Launched in 2018, Venti brings together an unsurpassed team internationally. The company has autonomous systems deployed in Asia for industrial and logistics sites and a growing pipeline. Venti has offices in Cambridge (Massachusetts, USA), Suzhou (China), and Singapore – our Asian headquarters.

The Senior Autonomous Vehicle Engineer will work, as part of our cross-functional and
world-class engineering team, to design drive-by-wire and sensor suite systems, and retrofit such systems to any vehicle, turning them into high-tech self-driving ones!

Role responsibilities

• Lead the design, development, and integration of wire harness systems for diverse applications.

• Generate detailed schematics and layouts for wire harnesses using tools like SOLIDWORKS Electrical.

• Partner with cross-functional teams to streamline system integration efforts.

• Perform testing and analysis to troubleshoot issues and select optimal materials & parts.

• Ensure all designs comply with safety protocols and industry standards.

• Coordinate with suppliers and provide technical expertise during manufacturing and testing.

• Create comprehensive documentation, including design specifications and testing reports.

• Support project planning by outlining objectives, timelines, and deliverables.
  

Required Experience

• Bachelor’s or Master’s degree in Electrical Engineering or related fields

• 4 to 6 years experience in electrical design & harness design

• Fundametal knowledge of drive-by-wire systems, sensor suites and compute systems.

• Experience with CANbus and other vehicle network protocols.

• Flexible problem-solver, ability to adapt to evolving requirements & ambigous situations.

• Familiarity with IPC standards & process documentation.
  

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at .

Job Description:

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Master’s or PhD degree in EE is required, preferably from a top-tier university.
• 2+ years of experience supporting or developing complex analog IC designs.

Required Experience:

• Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution, and other high-speed analog circuits is a must.
• Deep understanding of biasing, band-gaps, reference circuits, opamps, comparators, and other analog circuits.
• Solid track record for implementation of analog circuits for high-speed data transmission.
• Design and tapeout experience in advanced CMOS nodes (ex. 20nm or newer) is a must.
• Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
• Knowledge of TIA design and drivers for optical applications is highly desirable.
• Experience in RFIC design for wireless or wireline communication systems is highly desirable.
• Strong technical independent contributor with a proven ability to drive results.
• Excellent teamwork, presentation, and documentation skills.
• Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.
• Strong experience in lab chip bring-up and debugging efforts.

Preferred Experience:

• Relevant research publications and/or patents in analog or RF IC design.
• Familiarity with programming/scripting languages such as Python, Matlab, or C.
• Experience with PCB design.
• Familiarity with Verilog RTL or DSP design concepts.
• Knowledge of optical transceivers.
• Expertise in ESD protection techniques and IC packaging methodologies.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at .

Job Description:

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Master’s or PhD degree in EE is required, preferably from a top-tier university.
• 8+ years of experience supporting or developing complex analog IC designs.

Required Experience:

• Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution, and other high-speed analog circuits is a must.
• Deep understanding of biasing, band-gaps, reference circuits, opamps, comparators, and other analog circuits.
• Solid track record for implementation of analog circuits in high-speed data transmission.
• Design and tape-out experience in advanced CMOS nodes (e.g., 7nm, 5nm, 3nm FinFET) is a must.
• Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
• Knowledge of TIA design and drivers for optical applications is highly desirable.
• Experience in RFIC design for wireless or wireline communication systems is highly desirable.
• Strong technical independent contributor with a proven ability to drive results.
• Excellent teamwork, presentation, and documentation skills.
• Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.
• Strong experience in lab chip bring-up and debugging efforts.

Preferred Experience:

• Relevant research publications and/or patents in analog or RF IC design.
• Familiarity with programming/scripting languages such as Python, Matlab, or C.
• Experience with PCB design.
• Familiarity with Verilog RTL or DSP design concepts.
• Knowledge of optical transceivers.
• Expertise in ESD protection techniques and IC packaging methodologies.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

The Assistant Engineer, Power Maintenance works in a team to operate, maintain and repair equipment installed in the SMRT Power System in compliance with the departmental Quality Objectives as stated in the QP/WIs/Task lists in accordance with quality and safety standards so as to support SMRT in providing safe and reliable train service to our commuters.

The duties and responsibilities of an Assistant Engineer are as listed below. Note that the list is not comprehensive and related duties and responsibilities may be assigned from time to time.

• Lead a team of technical officers to carry out and/or supervise preventive and corrective maintenance works on SMRT power system equipment in compliance with relevant procedures and safety requirements.
• Plan and execute maintenance schedule and staff duty rosters in consultation with EMM in the most effective and efficient manner.
• Provide technical advice, information, and instructions to other staff and ensure all drawings, diagrams, manuals, and records are kept current and updated.
• Assist EMM in conducting engineering and safety analysis, investigations, and tests.
• Carry out and/or assist EMM in supervision of corrective maintenance, upgrading/modification/repair work and submit reports on completion of work.
• Comply and exercise safety at all times in accordance with Safety Procedures.
• Attend Permit-To-Work / Permit-To-Access for internal and external work parties.
• Ensure compliance with our Quality objectives as stated in our QP/WIs/Task lists in daily activities.
• Undertake any other tasks or functions that are incidental or ancillary to the performance of assigned work.

• A Diploma in Electrical Engineering from a recognized institution.
• At least 2 to 3 years of relevant experience in maintenance and troubleshooting of electrical equipment.
• Able to lead by example, communicate effectively, and work as a team.
• Physically fit, able to climb staircases and ladders, and stand for sufficient duration (4 hours) to accomplish the required fault assessment or inspection works.
• Lift tools and equipment of up to 5kg.

• Capable of communicating effectively within the team and with external stakeholders.
• Able to multi-task in a challenging environment.
• Lead a team and work independently.

Responsibilities:

• Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
• Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
• Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels
• Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out
• Work with design engineers to debug and identify root causes of simulation failure
• Support test engineers for post-silicon validation
• Mentor and coach team members and junior engineers. Drive verification efficiency

Requirements:

• MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
• In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology
• Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification
• Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
• Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
• Experience in verifying designs at both of RTL level and post-P&R gate level
• Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team

Experience in one or more of the following areas considered a strong plus:

• Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
• Experience in verifying mix-signal design and interface of digital and analog
• Experience of design verification for highspeed IO such as PCIE and DDR

Salary Range: S$80,000 - S$180,000 / year