771 Verification Engineer jobs in Singapore
Semi-Conductor Design Verification Engineer
Posted 2 days ago
Job Viewed
Job Description
JOB DESCRIPTION
In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition
• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.
• Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.
• Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working
• Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.
• Collaborate with digital design team to debug functional testcases and deliver functionally correct designs
The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment
JOB REQUIREMENTS
· BSEE or MSEE, entry level
· Strong communication, analytical and documentation skills and ability to interface with other groups
· Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products
· Strong hardware functional verification language and Object-oriental language development skill. Prefer with SystemVerilog/ UVM experience
· Familiar with ASIC verification methodology, tools, and development flow
· Working experience or familiar with Ethernet L2/L3 switch/router, SOC, AMBA bus, high-speed IO (USB-2/3, PCIe gen2/3, SATA), Flash controller, or CPU peripherals
#J-18808-Ljbffr(Sr./Staff) Design Verification Engineer
Posted 12 days ago
Job Viewed
Job Description
(Sr./Staff) Design Verification Engineer at OMNIVISION
DescriptionAs a design verification engineer, you will be part of a passionate verification team that develops and deploys state-of-the-art verification methodologies for complex designs. Your goal is to achieve zero-defect verification using advanced techniques such as UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification.
Requirements- Experience in UVM verification methodology
- Disciplined, quality-minded, and highly driven for excellence
- Excellent team player with good communication skills
- MSEE/BSEE in Electrical or Computer Engineering with 8+ years of relevant experience, or outstanding fresh graduates
- Relevant experience may qualify for Senior or Staff level responsibilities
- Experience in video processing and analytics is a plus
- Strong programming skills are a plus
- Seniority level: Mid-Senior level
- Employment type: Full-time
- Job function: Engineering and Information Technology
- Industry: Semiconductor Manufacturing
(Sr./Staff) Design Verification Engineer
Posted 12 days ago
Job Viewed
Job Description
Description:
- As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.
Requirements:
- Experience in UVM verification methodology.
- Disciplined, quality-minded, and highly driven for excellence.
- Excellent team player and good communication skills.
- MSEE/BSEE in Electrical Engineering or Computer Engineering, with 8 years of relevant experience, but are open to fresh graduates with outstanding results.
- Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities.
- Experience in video processing and video analytics is a plus.
- Passionate and strong in general programming is a plus.
(Sr./Staff) Design Verification Engineer
Posted 12 days ago
Job Viewed
Job Description
Description:
As a design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.
Requirements:
- Experience in UVM verification methodology.
- Disciplined, quality-minded, and highly driven for excellence.
- Excellent team player and good communication skills.
- MSEE/BSEE in Electrical Engineering or Computer Engineering, with 8 years of relevant experience, but are open to fresh graduates with outstanding results.
- Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities.
- Experience in video processing and video analytics is a plus.
- Passionate and strong in general programming is a plus.
Foundation IP Memory Verification Engineer

Posted 9 days ago
Job Viewed
Job Description
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
**Foundation IP Memory Verification Engineer**
We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the verification of foundation IP for AI products including memory compilers and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.
**Available Job Responsibilities**
+ Perform functional verification, root cause and resolve design discrepancies
+ Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them
+ Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them
+ Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins
+ Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them
+ Perform various QA and validation checks to ensure accurate timing and power models
+ Develop scripts to automate verification flow and data analysis
+ Support silicon debugs and correlation to spice models
+ Coordinate with memory design leads, modeling leads, and managers to define and execute on the memory validation plan
**Preferred Skills**
+ Good understanding of transistor level circuit behavior
+ Good understanding of signal integrity, EM/IR, and reliability analysis
+ Proficiency in running simulators, writing automation scripts, and are tools savvy
+ Good understanding of memory behavioral and physical models
+ Understanding of DFT schemes and chip level integration is a plus
+ Good communication, interpersonal, and leadership skills
+ Motivated, self-driven and good at multi-tasking
+ Passion for solving complex problems and willingness to learn
**Qualifications**
Requires a BS in Electrical or Computer Engineering and 2 years of related experience
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
(Sr./Staff) Design Verification Engineer
Posted today
Job Viewed
Job Description
Description:
- As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.
Requirements:
- Experience in UVM verification methodology.
- Disciplined, quality-minded, and highly driven for excellence.
- Excellent team player and good communication skills.
- MSEE/BSEE in Electrical Engineering or Computer Engineering, with 8 years of relevant experience, but are open to fresh graduates with outstanding results.
- Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities.
- Experience in video processing and video analytics is a plus.
- Passionate and strong in general programming is a plus.
(Sr./Staff) Design Verification Engineer
Posted today
Job Viewed
Job Description
Description:
As a design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.
Requirements:
- Experience in UVM verification methodology.
- Disciplined, quality-minded, and highly driven for excellence.
- Excellent team player and good communication skills.
- MSEE/BSEE in Electrical Engineering or Computer Engineering, with 8 years of relevant experience, but are open to fresh graduates with outstanding results.
- Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities.
- Experience in video processing and video analytics is a plus.
- Passionate and strong in general programming is a plus.
Be The First To Know
About the latest Verification engineer Jobs in Singapore !
Senior/Staff Design Verification Engineer
Posted today
Job Viewed
Job Description
Overview:
We are looking for result-driven candidates who would thrive under a fast-pace working environment and having a strong desire to make an impact in their organization.
Job description:
- IC physical design of 6nm/4nm/3nm and below world leading advanced process chip, from RTL to GDS
- Block coordinator role for Synthesis/APR/PV tasks of more than 10 blocks, solving the critical issue and give the solution to block owners
- TOP role for the complicated hierarchical chip (more than 20 million instances plus 1000+ macros), doing floorplan, partition and assembly etc
- PD PM role to coordinate with Frontend and Signoff team about on time delivery of the SoC PD tasks, responsible for full chip PD schedule and tapeout
Job Requirements:
- Strong knowledge of IC design, leader role with tapeout experience is a must
- Strong knowledge of UNIX/LINUX env and capable of at least one of the following programming language: C/C++, Python, TCL, Perl
- Excellent communication and teamwork spirit, could coordinate with different teams to conquer all gating items, drive team to finish the assigned task on time with quality
PERSOLKELLY Singapore Pte Ltd
• RCB No. 20007268E EA License No. 01C4394
• EA Registration No. R21103542 (Ling Kai Jin)
By sending us your personal data and CV, you are deemed to consent to PERSOLKELLY Singapore Pte Ltd and its affiliates to collect, use and disclose your personal data for account creation in GO and the purposes set out in the Privacy Policy You acknowledge that you have read, understood, and agree with GO's Terms of Use the Privacy Policy. If you wish to withdraw your consent, please email us at Please feel free to contact us if you have any queries.
Tell employers what skills you havePerl
Documentation Skills
UVM
Finish
SoC
Python
SystemVerilog
Ethernet
Flash
Functional Verification
ASIC
IC
Physical Design
VLSI
(Sr./Staff) Design Verification Engineer
Posted today
Job Viewed
Job Description
Description:
As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is simple – to achieve zero-defect with the best and smartest approach to the large verification space.
Requirements:
Experience in UVM verification methodology.
Disciplined, quality-minded, and highly driven for excellence.
Excellent team player and good communication skills.
MSEE/BSEE in Electrical Engineering or Computer Engineering, with 8 years of relevant experience, but are open to fresh graduates with outstanding results.
Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities.
Experience in video processing and video analytics is a plus.
Passionate and strong in general programming is a plus.
#J-18808-Ljbffr
Senior IC Design Verification Engineer
Posted today
Job Viewed
Job Description
About Bitdeer:
Bitdeer Technologies Group (Nasdaq: BTDR) is a leader in the blockchain and high-performance computing industry. It is one of the world’s largest holders of proprietary hash rate and suppliers of hash rate. Bitdeer is committed to providing comprehensive computing solutions for its customers.
The company was founded by Jihan Wu, an early advocate and pioneer in cryptocurrency who cofounded multiple leading companies serving the blockchain economy. Mr. Wu leads the company as Founder, Chairman, and CEO, while Matt Linghui Kong serves as Bitdeer’s CBO and provides leadership through deep industry knowledge and technology expertise.
Headquartered in Singapore, Bitdeer has deployed mining data centers in the United States, Norway, and Bhutan. It offers specialized mining infrastructure, high-quality hash rate sharing products, and reliable hosting services to global users. The company also offers advanced cloud capabilities for customers with high demands for artificial intelligence.
Dedication, authenticity, and trustworthiness are foundational to our mission of becoming the world’s most reliable provider of full-spectrum blockchain and high-performance computing solutions. We welcome global talent to join us in shaping the future.
What you will be responsible for:
Apply UVM (Universal Verification Methodology), SystemVerilog, Verilog, and SVA (SystemVerilog Assertions) languages in verification tasks
Develop and implement state-of-the-art verification methodologies, including UVM, C/C++, co-simulation, system emulation, and mixed-mode simulation/emulation
Contribute to projects requiring advanced verification tools such as Palladium Z1, HAPS, and Zebu platforms
Collaborate effectively within a team, ensuring high-quality deliverables
How you will stand out:
Possesses a Masters or Bachelors degree in Electrical Engineering or Computer Engineering
At least 3 years of relevant experience
Proficient in UVM, SystemVerilog, Verilog, and SVA languages
Strong knowledge in protocols such as SPI, UART, and I2C
Possesses knowledge of firmware development and in depth understanding of firmware development processes
Excellent team player with strong communication skills.
Highly driven and detail-oriented.
Has experience working with advanced verification platforms like Palladium Z1, HAPS, or Zebu.
What you will experience working with us:
A culture that values authenticity and diversity of thoughts and backgrounds;
An inclusive and respectable environment with open workspaces and exciting start-up spirit;
Fast-growing company with the chance to network with industrial pioneers and enthusiasts;
Ability to contribute directly and make an impact on the future of the digital asset industry;
Involvement in new projects, developing processes/systems;
Personal accountability, autonomy, fast growth, and learning opportunities;
Attractive welfare benefits and developmental opportunities such as training and mentoring.
---
Bitdeer is committed to providing equal employment opportunities in accordance with country, state, and local laws. Bitdeer does not discriminate against employees or applicants based on conditions such as race, colour, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union.
#J-18808-Ljbffr